The present invention relates generally to a method of manufacturing a semiconductor device and a semiconductor device manufactured by the method. More particularly, the present invention relates to an improved method of manufacturing a semiconductor device including capacitors, such as a DRAM (Dynamic Random Access Memory) device, and the like, in which each capacitor comprises a lower electrode having an HSG structure (Hemispherically Grained Structure) to increase electrostatic capacitance of the capacitor. The present invention also relates to a semiconductor device manufactured by such an improved method.
In a semiconductor device including capacitors, such as a DRAM device and the like, it is required that each of the capacitors has relatively large capacitance while occupying a small area in the semiconductor device. In order to increase the capacitance of the capacitor, various structures of the capacitor and, especially, various structures and shapes of a capacitor electrode are devised.
FIG. 6A through FIG. 6C are cross sectional views schematically showing various structures of a lower or inner electrode of a capacitor used in the DRAM device and the like. In each of FIGS. 6A through 6C, there is formed an interlayer insulating film 112 on a silicon substrate 111. In the interlayer insulating film 112, there is formed an opening 113, and the opening 113 is filled with a contact plug portion 114 made of conductive material. The lower electrodes 101 through 103, which have various shapes as shown in FIGS. 6A through 6C, respectively, are formed on the interlayer insulating film 112 such that the lower electrodes 101 through 103 are electrically coupled with the contact plug portion 114. Although not shown in the drawings, an upper or outer capacitor electrode is formed via an insulating film on the surface of each of these lower electrodes 101 through 103, thereby a capacitor is formed.
A box type or a simple stack type electrode 101 shown in FIG. 6A has a simple structure and is easy to manufacture. However, this structure has a disadvantage that the capacitance of the capacitor using the simple stack type electrode 101 is relatively small.
A cylinder type or a crown type electrode shown in FIG. 6B has a structure which is a little more complex than that of the simple stack type electrode 101 shown in FIG. 6A. However, this electrode has a larger electrode area than that of the simple stack type electrode 101 shown in FIG. 6A. Therefore, capacitance of the capacitor using the cylinder type electrode 102 can be approximately twice the capacitance of the capacitor using the simple stack type electrode 101.
In order to further increase the capacitance of the capacitor, there is known an HSG cylinder (hemispherically grained cylinder) type electrode which is fabricated by forming HSG (hemispherical grain) or an HSG layer (hemispherically grained layer) on or at a surface of the cylinder type electrode. FIG. 6C illustrates an HSG cylinder type electrode 103 having an ideal HSG structure. In the HSG cylinder type electrode 103, the area of the electrode is increased by the HSG layer formed at the surface thereof. The capacitance of the capacitor using the ideal HSG cylinder type electrode 103 is expected to become approximately 3.5 through 4 times of that of the capacitor using the simple stack type electrode 101. A method of growing the HSG layer at a cylinder type structure is disclosed, for example, in Japanese patent laid-open publication No. 9-167833.
However, in the prior art method of fabricating an HSG cylinder type electrode 103, it was difficult to properly grow the HSG both at an inner wall portion and at an outer wall portion of the cylinder type structure.
FIG. 7A through FIG. 7C illustrate schematic cross sectional structures at various stages, in order of process steps, during a conventional process of fabricating an HSG cylinder type electrode.
As shown in FIG. 7A, an interlayer insulating film 112, such as an oxide film and the like, is formed on a silicon substrate 111. Thereafter, by using, for example, photolithography and etching, the interlayer insulating film 112 is selectively removed and a contact opening 113 is formed. The contact opening 113 is filled with doped polysilicon or doped amorphous silicon and thereby a contact plug 114 is formed.
Thereafter, on the contact plug 114 and on the interlayer insulating film 112, a relatively thick silicon oxide film 115 is formed. Then, by using, for example, photolithography and etching, the silicon oxide film 115 is selectively removed and thereby an opening 116 is formed. In this condition, the top surface of the contact plug 114 is exposed via the opening 116 and at the bottom of the opening 116. Next, a relatively thin phosphorus doped amorphous silicon film 117 is formed inside the opening 116, i.e., on the inside bottom surface and on an inner side wall of the opening 116, and on the silicon oxide film 115, by using a thermal CVD method. Conventionally, taking the deposition rate or growth rate of a phosphorus doped amorphous silicon film into consideration, a deposition temperature or a growth temperature of the phosphorus doped amorphous silicon film of approximately 530 through 550 degrees Celsius is used in general. Thereby, the structure shown in FIG. 7A is obtained.
Thereafter, a recessed portion or trench 118 formed by the portion of the phosphorus doped amorphous silicon film 117 along the opening 116 is filled with coating glass not shown in the drawing. The phosphorus doped amorphous silicon film 117 is etched back. Then, the coating glass not shown in the drawing and the silicon oxide film 115 are removed by etching. Thereby, as shown in FIG. 7B, a cylinder structure 119 made of the remainder of the phosphorus doped amorphous silicon film 117 can be obtained.
The substrate having the structure of FIG. 7B is loaded into an HSG forming apparatus not shown in the drawing. The atmosphere around the substrate is depressurized, and silane gas is introduced around the substrate. Thereafter, the atmosphere around the substrate is evacuated and the substrate is heat treated. Thereby, HSG or an HSG layer 120 is grown at the surface of the cylinder 119. As a result, an HSG cylinder type electrode 121 is fabricated as shown in FIG. 7C.
However, as schematically shown in FIG. 7C, in the HSG cylinder type electrode 121 actually fabricated, at the inside wall surface, the HSG having an approximately expected shape is formed, but, at the outside wall surface, the HSG grows too much and unevenness becomes relatively small. Therefore, the outer wall surface of the HSG cylinder type electrode 121 actually fabricated by the conventional method becomes smoother than the inner wall surface.
The inventor of the present invention inspected the causes for such phenomenon, and found that the causes are as follows.
As shown schematically in FIG. 7A, when the phosphorus doped amorphous silicon film 117 is formed by using the thermal CVD method, crystalline nuclei 122 are produced in the phosphorus doped amorphous silicon film 117 near the interface between the phosphorus doped amorphous silicon film 117 and the silicon oxide film 112 and between the phosphorus doped amorphous silicon film 117 and the silicon oxide film 115. Portions of the nuclei 122 are not removed at the etching process thereafter and are left in the phosphorus doped amorphous silicon oxide film 117. Therefore, as shown schematically in FIG. 7B, the nuclei exist in the bottom surface portion and the outer wall portion 124 of the cylinder 119, and do not exist in the inner wall portion 123 of the cylinder 119. In the process of growing the HSG thereafter, the HSG grows preferentially from the nuclei 122 existing in the outer wall portion 124 of the cylinder 117. Therefore, it is considered that, in the finally fabricated HSG cylinder type electrode 121, forms of the fabricated HSG differ between the inner wall portion and the outer wall portion of the cylinder.
That is, when the substrate is loaded into an HSG forming apparatus and silane gas is introduced into the HSG forming apparatus, each of the hemispherical portions has already started to grow from each of the nuclei 122 existing in the outer wall portion of the cylinder 119. Also, during a process of heat treatment of the substrate to grow the HSG, the hemispherical portions grow faster at the outer wall portion 124 of the cylinder 119 than at the inner wall portion 123 of the cylinder 119. The condition of the process of growing the HSG is determined such that the HSG grows most appropriately at the inner wall portion of the cylinder 119. Therefore, when the ideal HSG is formed at the inner wall portion 123 of the cylinder 119, the HSG is overgrown at the outer wall portion of the cylinder 119. Each of the hemispherical portions of the HSG layer grown at the outer wall portion 124 of the cylinder 119 become relatively large, and therefore adjacent hemispherical portions are often joined to each other. Thus, the outer wall surface of the HSG cylinder type electrode 121 actually fabricated has smaller unevenness than that of the inner wall surface, and becomes smoother than the inner surface. As a result, by forming the HSG layer, a surface area of the inner wall surface of the HSG cylinder type electrode 121 increases considerably, but a surface area of the outer wall surface of the HSG cylinder type electrode 121 does not increase so much.
In practice, the capacitance of the capacitor using the HSG cylinder type electrode 121 fabricated by using the conventional method only becomes approximately 2.6 through 3.0 times the capacitance of the capacitor using the simple stack type electrode 101. It was impossible to obtain the capacitance value expected from the ideal HSG cylinder type electrode 103, that is, the capacitance value approximately 3.5 through 4.0 times the capacitance of capacitor using the simple stack type electrode 101.
Considering the above-mentioned disadvantages of the prior art, it is an object of the present invention to provide a semiconductor device and a method of manufacturing the semiconductor device in which an ideal HSG structure can be fabricated.
It is another object of the present invention to provide a semiconductor device and a method of manufacturing the semiconductor device in which formation of an abnormal and unexpected HSG structure caused by nuclei produced when a doped amorphous silicon film is formed can be suppressed.
It is still another object of the present invention to provide a semiconductor device and a method of manufacturing the semiconductor device in which a preferable HSG structure can be formed both at the inner wall portion and at the outer wall portion of the cylinder type doped amorphous silicon electrode body.
It is still another object of the present invention to provide a semiconductor device and a method of manufacturing the semiconductor device in which a preferable HSG structure can be formed both at the inner wall portion and at the outer wall portion of the cylinder type doped amorphous silicon electrode body and in which capacitance of the capacitor constituted using the HSG structure can be increased.
It is still another object of the present invention to provide a semiconductor device and a method of manufacturing the semiconductor device in which a preferable HSG structure can be formed both at the inner wall portion and at the outer wall portion of the cylinder type doped amorphous silicon electrode body, and in which deterioration of throughput of manufacturing the semiconductor device can be avoided.
According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising: forming a cylinder type electrode body which is made of amorphous silicon and which has at least an inner wall surface and an outer wall surface, the forming a cylinder type electrode body comprises at least forming an amorphous silicon film by using a thermal CVD method while controlling at least an initial growth temperature of the amorphous silicon film to be within a range from 450 to 520 degrees Celsius; and forming hemispherical grain (HSG) at least at the inner wall surface and at the outer wall surface of the cylinder type electrode body to form a hemispherically grained cylinder type electrode.
In this case, the HSG cylinder type electrode may be a lower or inner electrode of a capacitor.
It is preferable that the amorphous silicon film is a doped amorphous silicon film.
It is also preferable that, in the forming the amorphous silicon film by using a thermal CVD method, at least monosilane (SiH4) is used.
It is further preferable that, in the forming the amorphous silicon film by using a thermal CVD method, monosilane (SiH4) and phosphine (PH3) are used.
It is also preferable that, in the forming the amorphous silicon film by using a thermal CVD method, at least disilane (Si2H6) is used.
It is also preferable that, in the forming the amorphous silicon film by using a thermal CVD method, disilane (Si2H6) and phosphine (PH3) are used.
It is possible, in the forming the amorphous silicon film by using a thermal CVD method, to control the growth temperature of the amorphous silicon film to be always within a range from 450 to 520 degrees Celsius.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising: forming a cylinder type electrode body which is made of amorphous silicon and which has at least an inner wall surface and an outer wall surface, the forming a cylinder type electrode body comprises at least a first step of forming a first amorphous silicon film by using a thermal CVD method and a second step of forming a second amorphous silicon film on the first amorphous silicon film by using a thermal CVD method, wherein the growth temperature of the first amorphous silicon film in the first step is lower than the growth temperature of the second amorphous silicon film in the second step; and forming hemispherical grain (HSG) at least at the inner wall surface and at the outer wall surface of the cylinder type electrode body to form a hemispherically grained cylinder type electrode.
In this case, the HSG cylinder type electrode may be a lower or inner electrode of a capacitor.
It is preferable that, in the first step, the growth temperature of the first amorphous silicon film is controlled to be within a range from 450 to 520 degrees Celsius, and, in the second step, the growth temperature of the second amorphous silicon film is controlled to be a temperature higher than 520 degrees Celsius.
It is also preferable that the first and second amorphous silicon films are doped amorphous silicon films.
It is also preferable that the second step is performed substantially continuously after the first step.
It is further preferable that, in the first step, the first amorphous silicon film is formed by using a thermal CVD method which uses at least disilane (Si2H6), and, in the second step, the second amorphous silicon film is formed on the first amorphous silicon film by using a thermal CVD method which uses at least monosilane (SiH4).
It is still further preferable that, in the first step, the first amorphous silicon film is formed by using a thermal CVD method which uses disilane (Si2H6) and phosphine (PH3), and, in the second step, the second amorphous silicon film is formed on the first amorphous silicon film by using a thermal CVD method which uses monosilane (SiH4) and phosphine (PH3).
It is preferable that, in the first step, the first amorphous silicon film is formed by using a thermal CVD method which uses monosilane (SiH4) and phosphine (PH3), and, in the second step, the second amorphous silicon film is formed on the first amorphous silicon film by using a thermal CVD method which uses monosilane (SiH4) and phosphine (PH3).
It is further preferable that the first amorphous silicon film is thinner than the second amorphous silicon film.
According to still another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising: preparing a semiconductor substrate; forming a first insulating film on the semiconductor substrate; forming a first opening in the first insulating film; filling the first opening with an electrically conductive material; forming a second insulating film on the first insulating film and on a portion of the electrically conductive material filling the first opening; selectively removing the second insulating film and forming a second opening, wherein the top surface of the portion of the electrically conductive material filling the first opening is exposed through the second opening; forming a doped amorphous silicon film on the second insulating film and on a side wall surface and a bottom surface of the second opening by using a thermal CVD method, while controlling at least an initial growth temperature of the doped amorphous silicon film to be within a range from 450 through 520 degrees Celsius; filling a recessed portion surrounded by a portion of the doped amorphous silicon film formed along the second opening with a masking material; etching back the doped amorphous silicon film; removing the second insulating film and the masking material filling the recessed portion surrounded by the doped amorphous silicon; and forming hemispherical grain (HSG) at least at an inner wall surface and at an outer wall surface of the doped amorphous silicon film which is left and which has a cylindrical shape to form an HSG cylinder type electrode.
In this case, it is preferable that the forming a doped amorphous silicon film by using a thermal CVD method comprises a first step of forming a first doped amorphous silicon film by using a thermal CVD method and a second step of forming a second doped amorphous silicon film on the first doped amorphous silicon film by using a thermal CVD method, and wherein, in the first step, the growth temperature of the first doped amorphous silicon film is controlled to be within a range from 450 to 520 degrees Celsius, and, in the second step, the growth temperature of the second doped amorphous silicon film is controlled to be a temperature higher than 520 degrees Celsius.
According to still another aspect of the present invention, there is provided a semiconductor device comprising an HSG cylinder type electrode, the HSG cylinder type electrode is fabricated by: forming a cylinder type electrode body which is made of amorphous silicon and which has at least an inner wall surface and an outer wall surface, the forming a cylinder type electrode body comprises at least forming an amorphous silicon film by using a thermal CVD method while controlling at least an initial growth temperature of the amorphous silicon film to be within a range from 450 to 520 degrees Celsius; and forming hemispherical grain (HSG) at least at the inner wall surface and at the outer wall surface of the cylinder type electrode body to form a hemispherically grained cylinder type electrode.